Today, there is little doubt that RISC-V, the open source Instruction Set Architecture is an unmitigated and undeniable success. It's gone from technical specification to a leading player in both embedded and high performance computing spaces, globally. This achievement is monumental, yet it was not necessarily guaranteed... or was it?

This article will explore the reasons why the RISC-V ISA was destined for greatness; its destiny written in stone, from the very moment of its inception. This is a story of convergent development, academic and industrial necessity, and a natural-selection-like process driving the rapid and widespread adoption of RISC-V by industries, governments, and tech communities.

This is a story of a viral take-over of the computer hardware industry. This is the story of RISC-V.

It Begins...

RISC-V is called such because it is the fifth iteration of RISC designs to come out of UC Berkeley's Parallel Computing Laboratory. The team there had been designing ISA's for some time using open source licenses because, quite frankly, they needed them.

The patent burdens associated with academic computing work has, traditionally, been quite costly to universities and governments. Most viable Instruction Set Architectures must be licensed, and if they are to be modified by the institution, that license for customization rights can be prohibitive, even for a state funded college.

Given that need leads to ingenuity, the team had been iterating upon and refining their RISC specifications for some time, ultimately leading them to RISC-V.

Necessity is the Mother of Adoption

Unlike the now defunct OpenRISC, RISC-V began its life born out of necessity. It came about in the labs of UC Berkley, much like unix/bsd before it, because the staff and students there required it to perform their studies.

The Open Source license chosen for this model was done so not out of principal, again as OpenRISC attempted, but out of practicality. How could a university ensure that educational institutions could benefit from the design if they made another proprietary model? That would just be reinventing another already reinvented wheel!

As other university computer science departments began to see the works published on RISC-V, the students and professors involved in the project began to receive a great deal of interest and questions about how to implement the design. It became so popular so quickly, because it is an evolutionary model of success.

Darwinian Challenge to the Status Quo

Early on many believed RISC-V to be a trivial project for trivial people, but what those early detractors failed to see was the viral nature of the beast. Like a novel disease we might be familiar with, RISC-V flooded its way into the world's computing ecosystem as soon as it was able. The demand for RISC-V architecture has, and continues to, far outpace its supply. This demand is increasing supply, which only drives further hunger. There is no stopping RISC-V.

There never was.

The Future

RISC-V is the future of computing. We will likely never see the disappearance of x86, but it may be easily relegated to emulation and retro hardware tech within our lifetimes.

MIPS has announced they are switching to RISC-V for all future designs.

Intel attempted to buy SiFive. Intel already uses microcode to convert x86 instructions into a proprietary RISC instruction set. This indicates that even intel is switching to RISC-V under the hood.

Straight Facts

The now is RISC-V. We don't even have to wait for the future. RISC-V is cropping up everywhere, and it's already dominating many microcontroller markets. It is likely you have one or more RISC-V devices in your home already, if not on your person.

While its software ecosystem remains less mature than arm, we are rapidly approaching parity in terms of supported software, stability, and efficiency. ARM, recently called the future of computing, will quickly become irrelevant when that parity is achieved. Manufacturers simply will not choose to pay an additional licensing fee when they don't have to anymore.

RISC-V won the ISA wars in the 32-bit and 64-bit spaces. The remaining competitors are destined to adopt RISC-V or struggle to stay relevant.

Mark my words!

The Evolutionary Success of RISC-V

MagesGuild by Magus Gaius Mycelius, Jocundus is licensed under CC BY 4.0